Author: Robert Hyatt
Date: 08:47:53 02/06/03
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On February 06, 2003 at 05:21:54, Sune Fischer wrote: >On February 06, 2003 at 00:54:58, Robert Hyatt wrote: >> >> >>In the case of the x86, GP registers can be used for "general purpose" stuff. >>Including integer math, address calculations, indexing, loop counting, etc. >>The MMX stuff uses the FP processor registers in a bizarre way so that you >>can execute a single instruction that will operate on multiple parts of one >>of the 64 bit FP registers at the same time. IE increment each of the 8 bytes >>at the same time, a form of SIMD operation... I'm not sure what XMM would >>apply to... But having several types is not uncommon. The cray had 64 bit >>scalar registers, 32 bit address calculation/indexing registers, and 8 >>vector registers with 128 words of data per register... It also had 64 >>"temp" scalar registers that couldn't be used for calculations, but they >>could be used as 1-cycle-access-time places to store the scalar registers >>if you "ran out"... ditto for 64 address temps for the 32 bit address >>registers. > >What is a "vector" register? > >I've seen you talk about how this sped up move generation because you did some >vector thing. Is that true and if so, how did it work? > >-S. It is a single register (v0, v1, ..., v7 on the cray, a total of eight of them) that _each_ hold 128 words. A single instruction can add two 128-word (we used 64 words obviously) vector registers and put the result in another vector reg. Or you can compare all elements with one instruction and get a 64 (or 128) bit mask showing for which "elements" the comparison was "true". The list goes on and on. Also when you do a vector load from memory, once the first word arrives in the vector register, it is used, and after that one new word arrives every clock cycle...
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