Author: Tom Kerrigan
Date: 13:03:21 02/12/03
Go up one level in this thread
On February 12, 2003 at 11:33:24, Robert Hyatt wrote: >>Of course it's related. Compilers have to rely on static branch prediction (80% >>accuracy) if they're going to effectively advance instructions before >You keep saying this but it isn't true. I can pull _any_ instruction and insert >it before >a branch, assuming it is architecturally feasible. On a sparc, with 32 GP Okay, so let's say you advance instructions from both branches. Maybe you have enough execution resources to do that, i.e., you have enough slots to handle all of the ILP before and after the branch (both paths). What about the branches after that? It's not uncommon for Pentiums to pair instructions with 2 or 3 branches between them. You have to run into issue contraints at some point. Occam's razor. Why is every high performance processor these days OOO, except for IA-64 and SPARC? MIPS, POWER, Alpha, PA-RISC. None of these chips are register starved and there are excellent compilers for all of them (esp. PA-RISC) but the chip designers still saw value in going way out of their way to make them OOO. That's not easy. They must have seen some value in it. Do you think they just did it on a whim? And is it just a coincidence that the US3 is so slow? >>Indeed. It's a shame only IA-64 chips run compiled code... oh, wait... >Notice his point, however. The OOOE can only execute what it can "see". Which >is >typically a pretty narrow "peephole" into the machine language instructions. >Compilers I understand his point but you don't understand mine. The compiler tricks you're discussing also increase performance of OOO processors. I mean, OOO processors don't have special logic to stall on instructions that are too far apart in the source code. >>>No. Predication is the IA-64's answer to branch prediction. Predication is >>>completely unrelated to OOOE. >>What, exactly, do you think the point of predication is, then? It's to allow >>instructions to execute before the condition is determined, in other words, out >>of order. (Or at least in order without being dependent.) If you think >But they _are_ different. Predication just says "do all of this crap and we'll >sort out later >which was crap and which was important." A compiler can do this on an old 286, The point of predication is to eliminate dependency on a branch. How can a compiler do this? In other words, how can a compiler say "we'll sort out later which was crap and which was important" without a branch on a non-predicated ISA? >Slower. But you missed the key phrase above "clock-for-clock". Show me _any_ >1.0ghz >X86 that can search (running crafty) 1.6M nodes per second. There isn't one. >In fact, there >isn't any X86 I know of that can do that at any clock rate, yet. My 2.8's peg >at 1.0-1.2M >nodes per second, and these are xeons with SMT on. Of course there will be some programs that run especially well on certain architectures. I already said this in the old thread. The G4 beats the crap out of x86s at SETI. Are you going to run Crafty on a Mac at the next tournament you enter? I'm sure it wouldn't be hard to find a chess program that runs like crap on IA-64. In fact, I know of one right now. -Tom
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