Author: Anthony Cozzie
Date: 21:30:52 02/12/03
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On February 12, 2003 at 11:37:25, Robert Hyatt wrote: >On February 12, 2003 at 00:27:20, Anthony Cozzie wrote: > >>and it is called a Cache Miss :) There is no way for a compiler to account for >>cache misses. >> >>it's one of the big problems with Itanium: get a cache miss, and the whole thing >>grinds to a halt. >> >>anthony > > >this is true for _any_ architecture. OOOE might have a few things it can fiddle >with while waiting, but any additional memory references are going to snag >things >up as well... the point is: because there is no dependency analysis with IA64 (in theory, although people are starting to propose superscaler backends :) if the Itanium has a cache miss, it STOPS. Period. It cannot do anything at all, because it has no concept of dependencies. An OOO architechture, on the other hand, simply flows around the cache miss. Sometimes this may not be possible, but given a large enough issue queue the CPU can usually find *something* to do. With a non-blocking cache, other memory accesses can go through while the first miss is serviced by L2/memory. In other words, an OOO machine can at least try to find SOME stuff to do :) anthony
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