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Subject: Re: IA-64 vs OOOE (attn Taylor, Hyatt)

Author: Robert Hyatt

Date: 20:51:38 02/13/03

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On February 13, 2003 at 14:59:18, Tom Kerrigan wrote:

>Well, I guess I'm wrong about P6 cmov then. Somebody told me that it was broken
>down into uops that were the equivalent of doing a branch (i.e., one of the uops
>was a branch) because the decision to add cmov to the P6 came late, and the
>ability to do predicated (sorry, conditional) moves in the datapath would have
>been too big a change.
>
>Although so far it sounds like nobody has actually done a test to see if cmov is
>faster, slower, or equal to a branch. You have your timing numbers (apparently
>from a manual) and Bob sort of vaguely recalls running something on a Pentium
>3...
>
>-Tom


I don't "vaguely recall".  I _ran_ the test a couple of weeks back and reported
on the result here along with posting the asm code I wrote.

I don't understand the "vaguely recall" nonsense.  My only point of being
"unsure" was that I ran the test on a PIII xeon and on a PIV xeon, and I was
not willing to state with any certainty that the normal PIII and PIV (non-xeon)
would exhibit the same behavior/performance _without_ any testing on my part.

There was no "vagueness" at all, other than in the extrapolation that a normal
PIII should perform like my PIII xeon, and that a normal PIV should perform
like my PIV xeon, but I can not easily verify it and at the time, I was only
interested in the branchless FirstOne() function as an interesting exercise to
show Vincent that all code doesn't have to have branches even though it makes
"decisions"...  So I ran it on what I had handy, and since the subject included
the longer PIV pipeline as compared to the PIII, it seemed reasonable to test
on both to see if there was any difference.  There didn't seem to be any
measurable difference...






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