Author: Tom Kerrigan
Date: 10:33:12 02/18/03
Go up one level in this thread
On February 16, 2003 at 03:03:03, Matt Taylor wrote: >On February 15, 2003 at 21:28:39, Tom Kerrigan wrote: > >>On February 13, 2003 at 19:40:45, Matt Taylor wrote: >> >>>You're not getting it. Logic on the processor for static branch prediction is >>>80% accurate because auxillary information available to the compiler is thrown >>>out. Consider the following loop: >>>for(i = 0; i < 1000; i++) >>> do_something(); >> >>You're the one who's not getting it if you think processors have logic for >>static branch prediction (hint: processors do dynamic prediction) or if you >>think these are the kinds of branches that matter for execution or compilation. >>(Any branch prediction scheme would predict your branch with 99.9% accuracy.) > >Doesn't matter what you call it. AMD seems to think my Athlon has static branch >prediction. I'm not sure why you disagree. I'm not sure why. Static prediction is defined as before runtime, at least for all the definitions I've seen. Maybe they're referring to data that the Athlon can collect for use with static predictors, i.e., profile directed compiling. >>They are if they better represent computer chess than Crafty does. I'd bet most >>chess programs out there don't use bitboards (i.e., 64 bit operations) or use >>bitboards less than Crafty. Bitboards are almost certainly the reason why Crafty >>performs well on I2 vs. the P4. >Perhaps it is, perhaps it isn't. Athlon is much more efficient with 64-bit >operations than Pentium 4 is, and the Athlon isn't pulling ahead by huge strides >(in Crafty). How do you figure the Athlon is more efficient? And what do you mean by operations? ANDing, ORing, etc.? How about loading, shifting, BSF, popcount, etc.? -Tom
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