Author: Robert Hyatt
Date: 17:36:06 02/19/03
Go up one level in this thread
On February 19, 2003 at 18:22:35, Tom Kerrigan wrote: >On February 19, 2003 at 00:29:06, Robert Hyatt wrote: > >>On February 18, 2003 at 13:33:12, Tom Kerrigan wrote: >> >>>On February 16, 2003 at 03:03:03, Matt Taylor wrote: >>> >>>>On February 15, 2003 at 21:28:39, Tom Kerrigan wrote: >>>> >>>>>On February 13, 2003 at 19:40:45, Matt Taylor wrote: >>>>> >>>>>>You're not getting it. Logic on the processor for static branch prediction is >>>>>>80% accurate because auxillary information available to the compiler is thrown >>>>>>out. Consider the following loop: >>>>>>for(i = 0; i < 1000; i++) >>>>>> do_something(); >>>>> >>>>>You're the one who's not getting it if you think processors have logic for >>>>>static branch prediction (hint: processors do dynamic prediction) or if you >>>>>think these are the kinds of branches that matter for execution or compilation. >>>>>(Any branch prediction scheme would predict your branch with 99.9% accuracy.) >>>> >>>>Doesn't matter what you call it. AMD seems to think my Athlon has static branch >>>>prediction. I'm not sure why you disagree. >>> >>>I'm not sure why. Static prediction is defined as before runtime, at least for >>>all the definitions I've seen. Maybe they're referring to data that the Athlon >>>can collect for use with static predictors, i.e., profile directed compiling. >> >> >>Static can also mean "based on previous results". IE a killer move is a >>static move ordering idea, it is based on history, not on what is happening >>_right now_... I don't know that that is what they mean, of course. > >Obviously not. Look up any dynamic branch prediction scheme and you will see >that it's based on the history of whether or not the branch has been taken. >Dynamic, in the case of branch prediction, means that it's done while the >program is running (moving, so to speak), i.e., what processors do. > >-Tom Then the only other explanation for "static" I can think of is what happens when the BTB doesn't have the target address in it. If the branch goes backward, it is assumed taken (a loop) while if it goes forward, it is assumed not taken. However, while I can't speak for AMD, Intel does it both ways. The BTB is the preferred way (and the PIV uses a really neat approach to recognize patterns of branches being taken and not taken) but when that fails, the "old school" way of branch direction is used..
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