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Subject: Re: GCC annihilating VISUAL C++ ==> branchless code in 2003?

Author: Matt Taylor

Date: 07:08:40 03/01/03

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On March 01, 2003 at 09:37:32, Vincent Diepeveen wrote:

>On March 01, 2003 at 00:32:48, Robert Hyatt wrote:
>
>don't wine Bob. K7 has a lot more registers than the sparc processor. From head
>i remember 44 rename registers then another 8 general registers and some other
>stuff probably as well. Then added to that at least another 8 MMX registers.

You don't seem to understand the purpose of rename registers. It has to do with
OOOE. The rename registers allow the processor to overlap work with more work
that uses the same registers with different values. Register clears/loads remap
an x86 register to a new rename register. The old rename register sits around
until work that depended on it finishes. You can't access any of the rename
registers yourself. You can only access the 8 GPRs.

Even when not talking about rename registers you are still way off. UltraSPARC
has 32 64-bit registers in each of 32 register windows. Doing the math, 32x32 =
1024 registers or 8 KB of register file. Athlon does not even begin to approach
this.

>The ultrasparc is completely outdated of course and before 2005 that won't
>change soon. Sun announced in fact that it would use in future AMD-opteron
>systems. A wise decision.

If by "outdated" you meant "slow" then yes.

Perhaps Sun will revise their JVM so it actually works on x86 platforms now.

-Matt



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