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Subject: Re: Introducing "No-Moore's Law"

Author: Jeremiah Penery

Date: 17:17:57 03/11/03

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On March 11, 2003 at 12:22:09, Robert Hyatt wrote:

>On March 10, 2003 at 19:56:12, Jeremiah Penery wrote:
>
>>On March 09, 2003 at 22:10:06, Robert Hyatt wrote:
>>
>>>Did you see an advertisement where someone was trying to convince you to
>>>buy over the other?  I doubt it.
>>
>>When P3 and P4 existed concurrently, every single ad where Intel advertised the
>>P4, they were trying to get you to buy P4 over P3.  Of course they didn't
>>explicitly say so, but I don't ever remember seeing an AMD ad where they
>>explicitly mentioned an Intel chip either.  The P3 was, for many things, faster
>>than the higher clocked P4.  Intel prematurely killed the P3 because they wanted
>>to sell P4s, and P3 could have made P4 look bad.
>
>You are arguing this from the _wrong_ side.

??? You asked if I'd ever seen an ad where Intel tried to convice me to buy a P4
over a P3.  I answered that question - every single ad Intel made for the P4 was
trying to get you to buy it over the P3.  No, they didn't specifically mention
the P3, but the AMD ads never specifically mentioned an Intel processor either.

>The PIV is 100% compatible with the
>PIII.  The inverse is _not_ true, and this is often referred to as "backward
>compatibility".

I gave one example earlier of where P4 is not 100% backward compatible.

>That is _different_ than their trying to sell a PIII and saying it is equal to
>the PIV but
>much cheaper.  And that case is closest to the K6 vs PII point.

I'm not sure what exactly you're trying to say.

>>>Again, it depends.  If I do a target=P3, I would expect that to run on a PIV.
>>
>>If I do target=Pentium, I'd expect it to run on a K6.  That's basically the
>>comparison you're making there.
>
>No, I bought a PII and did "target=pentiumII" because _ knew_ that the PII had
>different optimization isues than the original pentium.  The PII had an OOE core
>for example, while the original pentium depended on the compiler to pair
>instructions
>for the super-scalar execution units.  At the time I bought a PII, AMD was
>advertising
>their chip as faster and cheaper.  And it did _not_ say (but not 100%
>compatible) and
>that led to the confusion I mentioned.

You said, "If I do a target=P3, I would expect that to run on a PIV."
I replied "If I do target=Pentium, I'd expect it to run on a K6."

Is that not a fair analogy?  I'm not sure where the rest of your paragraph came
from, but it's pointlessly obfuscating.

>>>And most likely if I do a target=p4 it would run on a P3 although I can
>>>certainly think of reasons why it wouldn't.
>>
>>Most of the time it would, just as most of the time K6 would run P2 executables.
>> The only difference I'm aware of (for K6/P2) is CMOV.  For P3/P4 the difference
>>is SSE2.
>
>But _if_ you compile for the PIII it will absolutely run on the PIV.  If you
>compile for
>the PIV it will run on the PIV but perhaps not on the PIII depending on the
>instructions
>the compiler is capable of producing.  However, _nowhere_ did you see Intel say
>"The
>PIII is 100% compatible with the PIV".  You will find "The PIV is 100% backward
>compatible with the Pentium processor product line."

Point me to something where AMD specifically mentioned compatibility in terms of
the _P2_.  Nowhere did you see AMD say "The K6 is 100% compatible with the P2".

>>>But Intel doesn't market the P3 to be compatible with the P4.
>>
>>No.  They market P4 to be compatible with P3.
>
>Playing word games.  "backward compatible" is not "compatible".

Just a couple paragraphs ago, you wrote, "The PIV is 100% compatible with the
PIII."  Before you accuse me of playing 'word games', don't play them with your
own writing.

>look at their ads.  It's very clear what they are saying and what it means.

I think it's pretty clear what Intel's ads were trying to get across, but
apparently not, since you disagree.  As far as any ads for the K6, I guess it's
a matter of interpretation as well.



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