Author: Robert Hyatt
Date: 20:26:10 03/18/03
Go up one level in this thread
On March 18, 2003 at 19:49:17, Tom Kerrigan wrote: >On March 18, 2003 at 18:25:45, Robert Hyatt wrote: > >>On March 18, 2003 at 17:13:13, Tom Kerrigan wrote: >> >>>On March 18, 2003 at 17:02:22, Aaron Gordon wrote: >>> >>>>The motherboard is an Abit BP6. There's also 4-way interleaving on the Abit KT7, >>>>KT7a, BH6, Be6, Be6-2, BX6, BX6-2, etc. Tons and tons of boards support 2 & 4 >>>>way. Also if I recall correctly it treats 1 dimm as "2" banks. Back in the day >>>>when enabling 4-way interleave with two Kingmax PC150 dimms (256mb per) I saw at >>>>least a 20% fps increase in Quake3. I still have the KT7a if you want me to run >>>>any tests. >>> >>>Makes sense. Why have a _DUAL_ inline memory module if it doesn't do >>>interleaving? >>> >>>-Tom >> >> >>How do you transfer > 8 bytes of data from one thing, with only enough pins to >>transfer >>8 bytes at once? > >Well, let's see, because nobody said interleaving = > 8 bytes. THe basic memory bus width == 8 bytes, so interleaving _less_ buys you exactly nothing... > >SIMMs are 32 bits. DIMMs are two SIMMs, and (not coincidentally) 64 bits. DIMMs >are interleaved SIMMs in one package. Get it? I don't know. In that context, I suppose it makes sense. But that is a very poor approach to the issue. However, as to the context of SIMM = 32 bits, I am not certain of that. My quad P6/200 uses SIMMS and it has four banks to interleave 4 X 64 bits according to the docs. And I _can_ have one SIMM per bank and I don't just get 32 bits. Again, I'm not an expert on the details here, but it seems that the SIMMS have more than enough pins to transport 64 bits of data + 8 bits of ECC hamming, in one cycle. > >-Tom
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