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Subject: Re: So why does Itanic get faster w/ more cache?

Author: Eugene Nalimov

Date: 11:29:55 03/19/03

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I would not expect that going from 12-way associative to 6-way associative cache
will slow application so much.

There is simpler explanation: I just looked at Crafty's executable, and it
contains ~1.6Mb of static data. Of course part of that data are strings and not
really used in the search, but vast majority of data is used -- attack tables,
bitboard tables, masks, etc.

If you'll add to that code and dynamic data, you'll end up with working set that
is larger than 1.5Mb.

With 3Mb of L3 cache Crafty fits entirely into it (either without hash tables,
or with small default hash tables), so latency of each and every non-hash-table
access went down from ~150 CPU cycles to ~12 CUP cycles.

Thanks,
Eugene

On March 18, 2003 at 20:33:46, Tom Kerrigan wrote:

>Interesting case of seemingly conflicting data...
>
>Maybe by turning off half the chip's cache, it decreased the associativity
>enough to cause contention for some critical data. That's the best explanation I
>can think of.
>
>Nice benchmarking, Aaron. :)
>
>-Tom



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