Author: Jaime Benito de Valle Ruiz
Date: 07:31:31 04/17/03
Go up one level in this thread
On April 17, 2003 at 09:58:38, Russell Reagan wrote:
>On April 17, 2003 at 09:08:54, Jaime Benito de Valle Ruiz wrote:
>
>>__int64 x;
>>int y;
>>
>>__asm{
>> mov eax,dword ptr[x+4]
>> mov ebx,dword ptr[x]
>> bsf ecx,eax
>> add ecx,32
>> bsr ecx,[x]
>> mov [y],ecx
>>}
>>printf("The bit set to 1 is the bit No. %d",y);
>
>I don't know if you meant to do this or not, but you used bsf in one place and
>bsr in another.
>
>Keep in mind that this will not work if x is 0. You also don't need the mov's at
>the beginning. Faster, and safer, would be:
>
>int LowBit (unsigned __int64 x) {
> __asm {
> mov eax, -33
> bsf eax, dword ptr [x + 4]
> add eax,32
> bsf eax, dword ptr [x]
> }
>}
>
>This will return -1 if there are no 1-bits in x.
>
>>Another (faster) alternative if check first if one of the two 32bit registers is
>>set to 0, and then skip the BSF/BSR for that register, and do it only for the
>>other one, avoiding using a potentially slow BitScan.
>
>It depends which processor you are working with. If you are working on a PIII,
>for instance, the bsf/bsr instructions are 1-2 cycles, so you should avoid the
>conditional there. Then when you move to the PIV, you have larger branch
>misprediction penalties, so it might not be worth it there either.
Mmmmmmmmmm, I have to try that one, looks promising. I haven´t spent a lot
optimizing my code yet.
Anyway, the one I posted here is the one I use for the previous version of my
new program, and it works in my computer :)
I don´t have a Pentium, so the branching alternative is faster, according to my
tests.
Regards.
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