Author: Vincent Diepeveen
Date: 15:08:31 06/29/03
Go up one level in this thread
On June 29, 2003 at 11:27:56, Sune Fischer wrote: >On June 29, 2003 at 11:16:51, Jay Urbanski wrote: > >>On June 29, 2003 at 10:45:25, Sune Fischer wrote: >> >>>Right, but why is this interesting? >>>Honestly, to compile Crafty with a 32-bit compiler for a 64 bit chip smells like >>>incompetence to me. >>> >>>Finally the 32-bit hell is over, for good!! :) >> >>>-S. >> >>It's interesting because the vast majority of chess engines are 32-bit binaries >>without any source code provided. Granted if you're running Crafty you'd be >>silly to compile it as 32-bit; but most other engines don't provide you that >>option. >> >>It will be several years before we see commercial 64-bit engines for Opteron. >>We may never see them for Itanium. > >Depends on what you mean by 64-bit, I don't expect the non-bitboarders to >switch, but I'd certainly expect them to make use of it other ways, like simply >recompiling to 64-bit and coding for the extra registers. this is nonsense of course. First of all intel will be releasing x86-64 cpu's themselves. So what runs at opteron, will run in future at intel 64 bits cpu's too (don't confuse it with the itanium line which IMHO has failed for the low end market unless they can make them 10 times cheaper than they are now and less buggy and clock them 2 times higher). apart from some trivial advantages like you can do some pawnboards in 64 bits and 64 bits adressing, which will give some speedup and zobrist hashing that goes a lot easier, there is other advantages. Take the huge BTB at the opteron. BTB you ask? yes checkout the docs. it stands for branch target buffer. It's like 8 times that of the K7. L2 cache is 1MB. Though this would normally be not that relevant, it is relevant now, because the cpu's get so much faster now that L1 cache can't do everything for you anymore. Therefore the improved latency is also great. It's like 3 times faster that latency compared to what a dual K7-MP or dual P4-Xeon. Then there is a lot of small improvements at the chip which are very important. But you miss one of the biggest improvements. For some reason most forget to mention it. For years we had to do with just 8 stupid registers which get swapped away and so on. Now we get 16 registers. That's a *major* improvement. Of course 128 GPR registers is better, but opteron will always be higher clocked than any cpu having 128 general registers. I don't want to get into the itanium versus itanic discussions (whether the predication of the itanium is good or not) because coming tuesday i get a big presentation of the altix3000 system which is just installed at SARA. I prefer showing up with 500Mhz processors though at world champs 2003 unless i have a very hard proof that Itanium is faster for me than that (500 mips versus 64 itaniums). So far i didn't see any itanium system capable of more than 64 cpu's in 1 partition or node (SGI nowadays calls a partition a 'node'. And a node is called a calculation module or something; trivially that is because 99% of all scientists do not know the difference between nodes at a cc-NUMA machine versus nodes at clusters). That 16 registers *will* speed me up *bigtime* at opteron. I would be amazed if it doesn't speedup others a lot. >This would not take years, it will happen as soon as a significant portion of >their customers own them. > >You know, if there ever was a programmer who cared about the speed of his code, >then that would be a chess programmer. :) > >-S.
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