Author: Ernst A. Heinz
Date: 09:09:18 10/25/98
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On October 25, 1998 at 11:37:46, James Robertson wrote:
>
> [...]
>
>I still have problems understanding. Suppose you have, starting at address 0,
>four 8-bit values. If you access the first, then the whole "clump" of 32 bytes
>are loaded into the L2 cache. Ok, that makes sense.
>
>Suppose you access the second byte in chunk 0. Does the computer load chunk 0
>(bytes 0-3) into memory? or does it load bytes 1-4 into memory? Thanks for the
>help!
Dear James,
Instead of diving into the intricate details of specific cache implementations
(e.g. associativity, consistency, inclusion hierarchy, I/O strategy, latency,
line width, pipelining, prefetching, replacement strategy, size etc.) it is much
better IMO to think of them in more general terms. The appropriate abstractions
relating to cache behaviour are *spatial* and *temporal locality*.
- Temporal locality means that caches (just like registers) reward the reuse
of data within some close time frame (e.g. same basic block of code).
- Spatial locality means that caches reward accesses to spatially co-located
data within some close time frame (e.g. reading the elements of a vector
one after another).
In addition to the above, it is generally so that accesses in *ascending* order
to spatially co-located data are faster than equivalent accesses in descending
order (due to the nature of pipelining and prefetching).
By keeping these *general* considerations in mind, you can write portable code
that runs very efficiently on many different platforms.
=Ernst=
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