Author: Tom Kerrigan
Date: 11:12:04 07/07/03
Go up one level in this thread
On July 07, 2003 at 11:00:17, Robert Hyatt wrote: >On July 06, 2003 at 19:44:31, Tom Kerrigan wrote: > >>On July 06, 2003 at 18:41:42, Bo Persson wrote: >> >>>>Reading two bytes over a one byte bus? >>> >>>Except that it was actually a wider bus, but the full width wasn't used for >>>data, just for addresses. >>> >>>The 20 bit address bus was multiplexed with an 8 bit data bus on the same pins. >>>Elegant - no. Super kludge - yes! >> >>I still contend that just because something _lacks_ performance that it seems >>like it should potentially have does not make it a kludge. >> >>I'm not sure if you've ever wired up a board with one of these processors (or a >>similar processor) but I have, and let me tell you, it would have been great to >>have an 8 bit data bus instead of a 16 bit one. Not only would it have meant >>fewer (costly at the time) memory chips but also fewer supporting TTL chips and >>much less wire wrapping for yours truly. I'm sure if you took pictures of two >>wire-wrapped boards, with the different width data busses, there would be NO >>question which was more elegant. Of course IBM used PCBs, but the extra chips >>and the extra space for the chips and wiring would have made the boards that >>much more expensive. The boards were already huge as-is, IIRC... > >I did "wire one up". In my chess board. And as Bo mentioned, it _was_ a >kludge. You had to take the 16 address lines (it had a pure 16 bit address >space to start with limiting memory to 64K) and route them to the memory >controller to do the addressing. You used the same 16 lines and used 8 of >them for the data that came back. Kludge. Kludge. Kludge. Later memory Sure, except if you're using memory with 8 bit data out, then to have a 16 bit data bus, you have to wire up another memory chip with control lines, power, and the 16 address lines again (pain). If you're using the memory chips I'm thinking of, you also have to wire up some TTL logic to multiplex the 8 data out bits onto your address bus, and depending on your fan-out and whether or not you're using tristate busses, you need more TTL drivers or logic. >makers added the "software bank select" so that you could with one instruction >turn off one bank and turn on another bank, usually 32 K bytes at a time. But >with two banks, wouldn't it be nice to read 8 bytes from each and to 2x the >memory bandwidth. But not with the 8088 kludge. Well what business do you have using an 8088 if you want a 16 bit data bus, then? It's like buying a Celeron and complaining bitterly about the 128k cache. Well, if you wanted the bigger cache, why didn't you get the Pentium, smart guy? -Tom
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