Computer Chess Club Archives


Search

Terms

Messages

Subject: Re: Another memory latency test

Author: Keith Evans

Date: 12:23:19 07/17/03

Go up one level in this thread


It will be interesting to find out the discrepancy in the reported latencies.

I remember years ago that DRAM had a tRC of 110 ns, so in theory you could do an
endless stream of random reads and not see a latency worse than 110 ns at the
hardware level. (Excluding the occasional increase due to refresh.)

Of course you could have seen twice that do to heavy loading of DRAM signals
(which meant that you couldn't meet the paper spec), inefficiencies in the
processor or chipset,...

Keith



This page took 0.02 seconds to execute

Last modified: Thu, 07 Jul 11 08:48:38 -0700

Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.