Author: Walter Faxon
Date: 22:02:14 07/17/03
Go up one level in this thread
On July 17, 2003 at 19:27:28, Gerd Isenberg wrote: ... >the only reason nowadays to write assembler stuff is IMHO using MMX, SSE2 and >special processor instructions, the compiler don't supply, like bsf and cmov for >MSC. ... Hi, Gerd. Viz. MS Visual C 6 and generation of the "cmov" (conditional move) instruction, Matt Taylor informs me (from a couple of emails): ----- Pentium Pro, Pentium 2, and Pentium 3 are all the same design, but the latter processors have been tweaked significantly. Targeting one should effectively target them all in this case. Compiler option is /arch:SSE|SSE2 The bsf/bsr instructions are available as of VC 8. ----- If instead you're using the IDE this would be: Project Settings dialog C/C++ tab Category: Code Generation Processor: Pentium Pro I guess this all means that one can reasonably hope that selecting for the Pentium Pro should allow generation of cmov, though I would prefer an experiment to verify this. You might try getting an assembly output for the code I posted in message: http://www.talkchess.com/forums/1/message.html?306363 If that works I'll post it as a macro, additionally providing more functionality. Tell me whether you want lsb=0 or lsb=63. -- Walter
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