Computer Chess Club Archives




Subject: Re: Another memory latency test (another comment)

Author: Robert Hyatt

Date: 15:33:49 07/22/03

Go up one level in this thread

On July 22, 2003 at 16:53:18, J. Wesley Cleveland wrote:

>On July 22, 2003 at 16:09:51, Robert Hyatt wrote:
>>In looking at your code, it should be noted that a _good_ compiler will
>>eliminate it completely, which is a problem.  IE a good compiler builds a
>>complete dependency graph, and it will notice that you are not using any
>>of the results computed, and they should be simply dropped as "dead code".
>>I'll test this with gcc and icc and see what happens, for fun.
>I use MSVC. Since the results were significantly different, I had a clue that my
>code was doing something.

If you aren't careful, you can run the _same_ executable N times and get N
different speeds.  A program can be scattered around in physical memory in
different ways that cause different cache line aliasing conflicts.

That is one way to see a 1% speed change.  Go to a WMCCC event and watch
guys test, reboot, test, etc until they get a memory layout they like (which
produces the highest NPS they can reach) and then they run as is without re-
starting the program to keep that optimal layout.

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