Author: Robert Hyatt
Date: 15:28:24 08/25/03
Go up one level in this thread
On August 25, 2003 at 18:14:15, Sune Fischer wrote: > >>(status quo). > >Right, saw that one too late :) > >>That is exactly what I said. The issue is how many copy/makes have to be >>done per unit of time. Or how many units of time it takes to do a single >>copy/make. Depends on your time scale (1s or 1ns). >> >>A single cpu that will run crafty at 1M nps has a cache-cache and cache-memory >>bandwidth of X bytes/second. A single cpu that runs crafty at 2M nps has >>exactly twice the cache-cache and cache-memory bandwidth and twice the clock >>frequency. A dual-cpu just needs two cpus, but the two cpus give twice the >>cache-cache bandwidth, but _no_ improvement in cache-memory bandwidth. >> >>This was all about memory bandwidth with respect to copy/make. > >Aaah, and here lies our source of disagreement. > >I was always talking about cache to cache, or as Johan wrote "C2C" bandwidth. > >I think the assumptions for make/uncopy to match make/umake is that the stack >fits in cache, or else it will be heavily outgunned, even on a single. > >I doubt anyone disagrees with you there. > >>> >>>You made it sound like 2.4 was much worse than 1, which is just a silly >>>comparison at best. >> >>Clearly 2.4 _is_ much worse than 1. It requires 2.4X the bandwidth. > >Yes _if_ you need to go over the bus. > >-S. My stuff will _never_ fit in 512KB of L2, much less the far smaller L1/trace caches (on the PIV). I am _always_ going to be burning the bus.
This page took 0.01 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.