Author: Robert Hyatt
Date: 21:34:07 08/27/03
Go up one level in this thread
On August 26, 2003 at 21:21:32, Johan de Koning wrote: >On August 26, 2003 at 11:42:03, Robert Hyatt wrote: > >>On August 26, 2003 at 03:00:52, Johan de Koning wrote: >> >>>On August 25, 2003 at 18:04:29, Robert Hyatt wrote: >>> >>>>A single cpu that will run crafty at 1M nps has a cache-cache and cache-memory >>>>bandwidth of X bytes/second. A single cpu that runs crafty at 2M nps has >>>>exactly twice the cache-cache and cache-memory bandwidth and twice the clock > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ >>>>frequency. A dual-cpu just needs two cpus, but the two cpus give twice the >>>>cache-cache bandwidth, but _no_ improvement in cache-memory bandwidth. > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > >>>Nope, C2M bandwith is constant, regardless of n and f (hence constant :-). >> >>Actually it isn't. Some duals use interleaving. Some don't. All quads I >>have here use 4-way interleaving to ramp up the bandwidth significantly. > >You're actually helping me to invalidate the comparison above. >Now it is not just FALSE, it is even -TRUE. :-) > >... Johan Yes, but you missed my point. If you do a cache-cache copy, you also commit to do a cache-memory copy. And you likely commit to do a memory-cache read to replace the stuff you flushed out with the cache-cache copy. It is not terribly simple to calculate the effect. Which is why I chose to do the testing way back and get rid of the copy... It may well have changed with today's hardware for all I know, since I have not re-tested. But on the P6/200, copy/make was bad for me... Since then I haven't seen anything that convinces me this has changed, although it is possible it has.
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