Author: Robert Hyatt
Date: 11:17:56 09/03/03
Go up one level in this thread
On September 03, 2003 at 14:07:33, Gian-Carlo Pascutto wrote: >On September 03, 2003 at 13:29:02, Robert Hyatt wrote: > >>>I don't understand. >>> >>>Even the slowest access on a NUMA Opeteron is twice as fast as on a SMP >>>Xeon. >>> >>>How can it be slower then? >> >>You keep changing the subject. > >It's my first post in this part of the thread. If this was already >answered elsewhere, 'oops'. > >>I am not comparing apples to oranges. I am >>comparing two machines that are _identical_ in every way except one has a pure >>SMP memory interconnection while the other has a pure NUMA interconnection. >> >>No references to X86 vs Opteron. No references to Cray vs Sun. If you give >>me two boxes that are identical except for SMP vs NUMA, the SMP box will >>_always_ have a speed advantage. It might not be much for small numbers of >>processors, but it _will_ be there. > >I don't agree at all. The reason why the Opteron is so fast is (among >others) that it has a Northbridge on chip. This _forces_ it to be NUMA when >there's two or more chips. But it's by definition _faster_ than what it could >be if you would force SMP (and hence, a seperate memory controller that is >not on-chip). > >-- >GCP You are hung up on the X86 SMP platform. Forget X86. Just think "SMP". Go look at the Cray XMP/YMP/C90/T90. They use a crossbar. _not_ a bus. A good C90 for example has 16 processors, 4096 banks of memory, all with a big crossbar connecting them. any processor can access any bank in 120ns, unless two bang on the same bank. Then there is a 10ns penalty or so added in (bank busy delay). The point is that SMP does _not_ mean "shared bus" except for the world of the PC and some other smaller SMP boxes (Sun, alpha, etc.)
This page took 0 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.