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Subject: Re: AMD64 for chess

Author: Gerd Isenberg

Date: 13:04:32 09/23/03

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On September 23, 2003 at 15:34:04, Dann Corbit wrote:

>I notice that with the new MS VC++ .NET 2003 compiler, you can allow SSE and
>SSE2 operations to the compiler.

Aha, interesting.

I guess the compiler will use (may use for P4) SSE/SSE2 for SIMD float or double
arithmetic (four floats or two doubles per XMM-register).
I fear for SSE2-integer instructions you must use some special intrinsic
datatypes like __m128,__m128d and __m128i and SSE2 intrinsic functions, using
values of these types, most likely mapped to XMM-registers like:

__m128i _mm_slli_si128 (__m128i a, int imm);

Shifts the 128-bit value in a left by imm bytes while shifting in zeros.
imm must be an immediate

r := a << (imm * 8)


__m128i _mm_add_epi64 (__m128i a, __m128i b);

Adds the 2 signed or unsigned 64-bit integers in a to the 2 signed or unsigned
64-bit integers in b.

r0 := a0 + b0
r1 := a1 + b1



>
>I have not bothered to look at the assembly output, but sometimes it makes the
>binary go faster when you allow those instructions.
>
>So there must be times when they are of benefit.

Yes - unfortunately SSE2 as well as MMX instruction set is not very stringent.
Four(MMX) or five(XMM) possible data sizes (16*8,8*16,4*32,2*64,128-bit) but
instructions like padd or psllq work only with three or four types. E.g. there
is no byte shift (shift left one may be done by padd mmi,mmi) and no 128-bit
padd or psub. 128-bit shift works bytewise, but not bitwise and so on...

Gerd




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