Author: Vincent Diepeveen
Date: 14:29:18 10/14/03
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On October 14, 2003 at 16:18:28, Robert Hyatt wrote: >On October 14, 2003 at 14:29:36, Gerd Isenberg wrote: > >>On October 14, 2003 at 14:15:33, Vincent Diepeveen wrote: >> >>>On October 14, 2003 at 14:13:08, Gerd Isenberg wrote: >>> >>>>On October 14, 2003 at 10:07:10, Ricardo Gibert wrote: >>>> >>>>> >>>>>http://www.wired.com/news/technology/0,1282,60791,00.html >>>>> >>>>>Can this be productively used in a chess program? >>>> >>>>I don't know, simular hardware ressources may be more productive for chess, if >>>>implemented as hyperthreading devices. I guess it's a kind of further >>>>development of SSE and AltiVec technology. With huge register files >>>>(N * 64 * 64|128|256-bit?) and probably SIMD-wise integer instructions >>>>(including popcount?) and fast memory interface, i can imagine that it is >>>>usefull for a lot of nice things, like some eval passes, e.g. a first square >>>>wise and a final scalar product pass. And fill-attack generation, e.g. square >>>>wise in all 16 directions with a specialiced dumb fill routine. >>>> >>>>Gerd >>> >>>this is just floating point arrays. >> >>Aha, well may be a matter of interpretation. >>I havn't seen any instruction set yet. >> >>On the other hand, if float and double arithmetic becomes as fast (or faster) as >>integer, why not use it for eval purposes? >> >>Gerd > > >Correct. We did this on the Cray. FP was very fast there and it frees >up integer registers for addresses and array indices... That's of course true however at 16 processors of 100Mhz you reached 500k nodes a second with cray blitz. Each Cray processor can issue up to 29 instructions a cycle. Crafty at a 1.6Ghz K7 which can issue up to 3 instructions a cycle gets 1 million nodes a second. So something capable of 100M * 16 * 29 = 46.4G instructions a cycle you get 500k nps because it is a vector machine Something capable of 4.8G instructions a cycle you get 1 MLN nps because it is a x86 processor.
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