Author: Vincent Diepeveen
Date: 19:29:39 10/23/03
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On October 22, 2003 at 11:28:09, Gerd Isenberg wrote: >On October 22, 2003 at 03:33:05, Daniel Clausen wrote: > >>On October 21, 2003 at 15:29:19, Eugene Nalimov wrote: >> >>>On Itanium integer registers are actually 65 bits wide. 64 bits for data and one >>>NAT (not a thing) bit. >>> >>>:-) >>> >>>Thanks, >>>Eugene >> >>If there is a way to use this bit for yourself too, I'm sure Gerd will come up >>with another cool new algorithm! :) >> >>Sargon > >;-) > >I'm really not familar with this very interesting processor architecture. It has >an integer register file of 128! * 64+NaT. It seems well designed to do a lot of >parallel fill cycles. >I guess a set NaT-bit may trigger some exceptions/interrupts if you do some >operations with uninitialited registers, allowing some lowlevel try-catch like >control structures (including stack rewind?). > >Gerd Itanium2 is especially known for executing many NOP instructions :) Nah it isn't that bad. It's a cool cpu in fact. Too bad it can't be clocked very high. It's horror & co for bitboards though. Forget writing in assembly for that processor :)
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