Author: Robert Hyatt
Date: 17:57:56 11/17/98
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On November 17, 1998 at 15:48:55, Ernst A. Heinz wrote: >On November 17, 1998 at 15:26:23, Robert Hyatt wrote: > >>On November 16, 1998 at 19:45:31, Terry Presgrove wrote: >> >>>I just read that AMD's new K-7 chip will support multi-processing >>>but I'm not sure it will be shared memory? Here is the quote from >>>AMD's home page. "About the AMD-K7(TM) Processor >>>The AMD-K7 processor with 3DNow!(TM) technology is a Microsoft® Windows® >>>compatible, seventh-generation design featuring a deeply pipelined, nine-issue >>>superscalar microarchitecture optimized for high clock frequency; a superscalar >>>pipelined floating point unit; 128KB of on-chip level one (L1) cache; a >>>programmable high-performance backside L2 cache interface; and a 200 MHz Alpha >>>EV6 compatible system bus interface with support for scalable multiprocessing. >>>The AMD-K7 processor is slated for introduction in the first half of 1999 and is >>>planned to operate at clock frequencies greater than 500 MHz." >>>I guess the key phrase is "scalable multiprocessing" anyone have a clue >>>as to what this means? I am particularly interested in its impact on chess >>>programs? >> >>Here's the main issue... Intel owns the "IO_APIC" design for handling >>interrupts at the hardware level. They won't (so far) license it to anyone >>else. This means that APIC interrupt handling is only going to apply to the >>Intel processors. OK for step 1. >> >>Next, Linux and NT support SMP, but *only* via the APIC interrupt handling >>approach. Which again means only on Intel processors. >> >>So the answer is "yes, the K7 *can* be used in a SMP computer, but no, it won't >>be usable for a long time, if ever, because no one wants to rewrite the >>interrupt handlers to use the AMD interrupt controller design." When enough >>are "out" Linux will likely support it. But don't look for something very >>quickly... because until there is an operating system to support it, it is >>going to be hard to get a vendor to design/build SMP motherboards for that >>processor... and until they do, there won't be any O/S support... and on and >>on... :) > >Please do not deride SMP-capable K7 mainboards so fast, Bob ... :-) > >Your chain of arguments applies perfectly to the current situation with the >K6s & K6-2s which in principle support SMP as well but lack according boards >to show their according power. > >In case of the K7, however, the situation is definitely different because the >K7 uses the same external bus interface as the new DEC/Compaq Alpha-21264. >Because AMD and Compaq are close business partners, it is to be expected that >the Alpha-21264 SMP mainboards of Compaq will make a perfect fit for the K7 as >well (and probably not only the SMP boards). Some enthusiasts are already >dreaming of "hyprid" systems with Alpha-21264 & AMD-K7 on the same board. :-) > >The final SMP test of the K7 will therefore probably be the software support >which should be doable for Linux and Windows NT if Compaq is really interested >in selling K7-based SMP workstations and servers. > >=Ernst= I hope I wasn't deriding too badly... :) But AMD does have the interrupt problem, and even when the EV6 bus K7 pops out it will take a while I'd bet. But I'm somewhat down on AMD after some linux kernel guys have had bad runs of luck with them.. IE the intel pentium (not pro or II) had the famous "foof" bug that was found and intel posted a fix within hours of it coming up. AMD K6 has a much worse bug in the (apparently) branch prediction code, and a simple 3 line asm program will hang the CPU to the point that a soft reset won't clear it. Folks have called to report or ask for a fix and AMD hangs up on them. No discussion. No fix... that leaves some of us "linux folks" disturbed a bit... I've run a couple of K6 linux machines.. Cpu looked good, but the two we had misbehaved... IE a program that took 4 hours to run would run perfectly on a Ppro or PII, but would crash every time on the K6. They weren't helpful to us and we have no K6's left here...
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