Computer Chess Club Archives


Search

Terms

Messages

Subject: Re: GCC Inline Assembler

Author: Robert Hyatt

Date: 07:13:33 02/14/04

Go up one level in this thread


On February 14, 2004 at 07:41:08, David Rasmussen wrote:

>I have this
>
>inline int FirstBit(const BitBoard bitboard)
>{
>        __asm
>        {
>                bsf eax,[bitboard+4]
>                xor eax,32
>                bsf eax,[bitboard]
>        }
>}
>
>currently, which works with VC++. How do I do the same in gcc?
>
>/David


int static __inline__ FirstBit(BITBOARD word) {
  int dummy;
       asm ("        bsf    %2, %0"     "\n\t"
            "        xor    $32, %0"    "\n\t"
            "        bsf    %1, %0"     "\n\t"
  : "=&q" (dummy), "=&q"
  : "q" ((int) (word>>32)), "q" ((int) word)
  : "cc");
  return (dummy);


Note that for safety, you could add a "l" to each of the above opcodes to
indicate they are working with 32 bit (long) values.  However, they will default
correctly because of the stuff on the end...

The above is much better than the MSVC version you had, as the above uses
dynamic register numbers, letting the compiler choose which register to use.
Note also that the above is _unsafe_ as it depends on a behavior that is not
specified in the X86 bsf/bsr definition.  It works today.  It might not work
tomorrow.



This page took 0 seconds to execute

Last modified: Thu, 15 Apr 21 08:11:13 -0700

Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.