Author: Slater Wold
Date: 16:48:39 02/18/04
Go up one level in this thread
On February 18, 2004 at 19:43:13, Keith Evans wrote: >On February 18, 2004 at 16:44:50, Slater Wold wrote: > >>On February 18, 2004 at 16:41:01, Dann Corbit wrote: >> >>>http://tams-www.informatik.uni-hamburg.de/vhdl/ >>> >>>This looks like a good start: >>>http://www.eda.org/comp.lang.vhdl/ >> >>As Keith would say, "JUST SAY NO TO VHDL". >> >>Verilog is the only way to go... > >There are a lot of people who like VHDL. Out here in California my perception is >that most people prefer Verilog. If you're learning an HDL from scratch then I >believe you'll have an easier time with Verilog. > >But the first thing to do is to learn about hardware design. And you don't need >either Verilog or VHDL to understand the concepts. (There are also products like >Celoxica's C-based tools for hardware design, but I wouldn't personally choose >to use them. I think there's even a tool to convert matlab scripts...) > >If you want to learn about verification using Verilog/VHDL/... then I recommend >Janick Bergeron's book. I don't know of any great design book - I have seen some >awful ones. In the past I recommended that people study the simple examples >provided with products like Synplicity. If you can design in schematics, then >HDL is easy. > >-K I learned a lot off the web. There are tons of colleges that put their 'homework' and 'project' stuff on the internet (most of them are EE classes). I'd say I learned about 75% from there. The rest from the Verilog handbook, mailing lists, examples with programs, Marc B., and of course, Keith Evans, himself. :)
This page took 0 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.