Author: Vincent Diepeveen
Date: 11:30:04 06/17/04
Go up one level in this thread
On June 17, 2004 at 13:29:02, Anthony Cozzie wrote: >On June 17, 2004 at 13:20:40, Eugene Nalimov wrote: > >>On June 17, 2004 at 06:55:18, Vincent Diepeveen wrote: >> >>>[...] >>> >>>Please list the processors in order of L2 cache speed and you'll realize that >>>speed still is of overwhelming importance. List them at random access speed for >>>L2 cache (some processors are faster in streaming than random access in their >>>caches like P4). >>> >>>Basically opteron has fastest L2 cache which can deliver each 13 cycles data (4 >>>reads simultaneously even if i understand well). No other processor can deliver >>>data from L2 cache that fast. >> >>Intel Itanium 2 Processor Reference Manual For Software Development and >>Optimization, Table 6-4 "Cache Summary": >> >>Itanium2 cache latency: >> L1: 1 cycle, 4 loads/cycle >> L2: 5 cycles (integer loads), 4 loads/cycle >> L3: 12/14 cycles, depending on cache size (integer loads), 1 load/cycle >> >>Thanks, >>Eugene >> > >Correct me if I am wrong, but aren't Itanium's caches off by 1? In other words, >the 6MB cache on the Itanium is L3, and the L1 cache is like 1KB? > >It is really amazing to me that Intel can't clock Itanium at 3+ GHZ. > >anthony The cpu is *huge* from head i remember like 361mm^2 it *starts* at. It's a DSP processor of course, for chess it's a complete joke. I was in fact *positively* surprised that using PGO and intel c++ 7.1 (linux) that single cpu a 1.3Ghz Itanium2 was same speed like 2Ghz K7 for me (that was microsoft visual c++ 6.0) then when i received net2003, that was another 5% faster so effectively K7 already faster now. Opteron therefore is more than 2 times faster than itanium. However the reason why itanium can't get clocked so high is its L3 cache of course. Without it, the processor is very poor. How to else get instructions into the L1I cache? How to fill L1I cache *anyway* with instructions? Opteron puts them in the 13 cycle L2 cache at 2.4Ghz. Itanium is 17+ cycle (source = Jason Priestly) when using sequential at L3 cache and it's just 1.3-1.4Ghz clocked. The 1.5Ghz+ are like 15k dollar a piece or so if you buy 1000 of them you can get 'em for 'just' $4300 or so. But then you do not have HP garantuee. Configured quad itanium2 : www.hp.com And it's equal to a quad K7 then for diep... Please realize diep is relative fast on itanium compared to other 32 bits software because diep is using many loops. Good for its tiny L1I cache... Other software i tried was very slow at itanium2, that included some random generators and such. Of course i use ranrot, using rotating instructions which itanium doesn't have. I didn't even know this by the way. It just misses too much. Try to do a division at itanium2! It doesn't have a division instruction on chip! Basically it misses a big L1 cache. It needs a 128KB L1 cache *minimum*. But then the chip is more expensive to produce of course...
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