Author: David Blackman
Date: 23:30:09 01/30/99
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On January 30, 1999 at 11:27:35, Robert Hyatt wrote: >On January 30, 1999 at 08:11:42, Antonio Palma wrote: > >>I have just tested a 1.0 b version of the memturbo program on a 64 Mb 333 AMD K6 >>on a Fritz 5.32 hash 32 and surprisingly i have these results: >> >>Fritzmark 204+/-6 without memturbo >>Fritzmark 244 +/- 5 with memturbo >there are only two ways to do this: > >1. if you have a 'tweakable bios' you can tune the timing up but you can easily >overrun memory and produce either gross or very subtle errors. I doubt your >utility does this as every MB has a different bios anyway. > >2. there is a well known cache-line aliasing problem. This utility probably >moves the program so that it runs in physically contiguous RAM pages, so that >it gets the best possible RAM-to-cache mapping possible, which is a _serious_ >problem for everyone (even unix... I am currently working on testing a 'page- >coloring' algorithm for linux that fixes this there, for example). 3. Rewire the paging mechanism in the operating system so programs get 4MB pages instead of 4KB, at least for most of their pages. This leads to a big reduction in TLB misses if you are doing truely random access (as in a hash table), and the size of the memory used is right (roughly 512K to 32M for some CPUs, but it varies.) A TLB miss roughly doubles the access time of main memory. This would not be a lot of fun to implement, especially for a system like Windows 95 where you can't find out how it works. But it would be nice for some programs if it could be done.
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