Author: Gerd Isenberg
Date: 06:09:40 05/01/05
Go up one level in this thread
On May 01, 2005 at 08:14:16, Dieter Buerssner wrote:
>On May 01, 2005 at 07:43:35, Gerd Isenberg wrote:
>
>>On May 01, 2005 at 05:15:57, Dieter Buerssner wrote:
>>
>>>For real 64 bit multiplications/devisions: How is the cycle count for these
> ^ that typo looks horrible.
>>>instructions on AMD64? I would fear, that it needs quite a few more cycles, than
>>>32 bit counter parts.
>>
Syntax Encoding Decode Latency
First ModRM type
>>IMUL mreg16 F7h 11-101-xxx VectorPath 4
>>IMUL mreg32/64 F7h 11-101-xxx Double 3/ 5
>>MUL mreg16 F7h 11-100-xxx VectorPath 4
>>MUL mreg32/64 F7h 11-100-xxx Double 3/ 5
>>DIV mreg16/32/64 F7h 11-110-xxx VectorPath 23/39/71
>>IDIV mreg16/32/64 F7h 11-111-xxx VectorPath 26/42/74
>
>Gerd, thanks for positing the numbers. I am not sure, I understand the table.
>F7h is the upcode prefix for 64 bit operations?
No - the first opcode byte of mul/div with implicit ax/eax/rax dx/edx/rdx
operands. 64-bit prefix is extra.
>And each of the mul operations
>will produce a 128 bit result (with obvious zero bits starting for a smaller
>multiplicand)? If this is correct, what is the cycle count for the "old" MUL
>mreg32 that multiplies two 32 bit words?. This would be the real comparision for
>my little example. "mul number_of_entries", in the typical 32 bit engine as
>32*32->64, in the 64 bit engine 64*64->128.
>
>Just curious about the MUL mreg16 - doesn't it need another upcode prefix (like
>many 16 bit operations on x86-32)?
>
>Similar, the DIV above is on 64 bit pair dx:ax and produces 2 64 bit results for
>division and modulo just like the normal div for 32-bit?
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_7044,00.html
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_3748,00.html
AMD64 Technology
AMD64 Architecture
Programmer’s Manual
Volume 3: General-Purpose and System Instructions
IMUL reg/mem8 F6 /5 Multiply the contents of AL by the contents of an 8-bit
memory or register operand and put the signed result in AX.
IMUL reg/mem16 F7 /5 Multiply the contents of AX by the contents of a 16-bit
memory or register operand and put the signed result in DX:AX.
IMUL reg/mem32 F7 /5 Multiply the contents of EAX by the contents of a 32-bit
memory or register operand and put the signed result in EDX:EAX.
IMUL reg/mem64 F7 /5 Multiply the contents of RAX by the contents of a 64-bit
memory or register operand and put the signed result in RDX:RAX.
IMUL reg16, reg/mem16 0F AF /r Multiply the contents of a 16-bit destination
register by the contents of a 16-bit register or memory operand and put the
signed result in the 16-bit destination register.
IMUL reg32, reg/mem32 0F AF /r Multiply the contents of a 32-bit destination
register by the contents of a 32-bit register or memory operand and put the
signed result in the 32-bit destination register.
IMUL reg64, reg/mem64 0F AF /r Multiply the contents of a 64-bit destination
register by the contents of a 64-bit register or memory operand and put the
signed result in the 64-bit destination register.
IMUL reg16, reg/mem16, imm8 6B /r ib Multiply the contents of a 16-bit register
or memory operand by a sign-extended immediate byte and put the signed result in
the 16-bit destination register.
IMUL reg32, reg/mem32, imm8 6B /r ib Multiply the contents of a 32-bit register
or memory operand by a sign-extended immediate byte and put the signed result in
the 32-bit destination register.
IMUL reg64, reg/mem64, imm8 6B /r ib Multiply the contents of a 64-bit register
or memory operand by a sign-extended immediate byte and put the signed result in
the 64-bit destination register.
IMUL reg16, reg/mem16, imm16 69 /r iw Multiply the contents of a 16-bit register
or memory operand by a sign-extended immediate word and put the signed result in
the 16-bit destination register.
IMUL reg32, reg/mem32, imm32 69 /r id Multiply the contents of a 32-bit register
or memory operand by a sign-extended immediate double and put the signed result
in the 32-bit destination register.
IMUL reg64, reg/mem64, imm32 69 /r id Multiply the contents of a 64-bit register
or memory operand by a sign-extended immediate double and put the signed result
in the 64-bit destination register.
MUL reg/mem8 F6 /4 Multiplies a 8-bit register or memory operand by the contents
of the AL register and stores the result in the AX register.
MUL reg/mem16 F7 /4 Multiplies a 16-bit register or memory operand by the
contents of the AX register and stores the result in the DX:AX register.
MUL reg/mem32 F7 /4 Multiplies a 32-bit register or memory operand by the
contents of the EAX register and stores the result in the EDX:EAX register.
MUL reg/mem64 F7 /4 Multiplies a 64-bit register or memory operand by the
contents of the RAX register and stores the result in the RDX:RAX register.
DIV reg/mem8 F6 /6 Perform unsigned division of AX by the contents of an 8-bit
register or memory location and store the quotient in AL and the remainder in
AH.
DIV reg/mem16 F7 /6 Perform unsigned division of DX:AX by the contents of a
16-bit register or memory operand store the quotient in AX and the remainder in
DX.
DIV reg/mem32 F7 /6 Perform unsigned division of EDX:EAX by the contents of a
32-bit register or memory location and store the quotient in EAX and the
remainder in EDX.
DIV reg/mem64 F7 /6 Performs unsigned division of RDX:RAX by the contents of a
64-bit register or memory location and store the quotient in RAX and the
remainder in RDX.
IDIV reg/mem8 F6 /7 Perform signed division of AX by the contents of an 8-bit
register or memory location and store the quotient in AL and the remainder in
AH.
IDIV reg/mem16 F7 /7 Perform signed division of DX:AX by the contents of a
16-bit register or memory location and store the quotient in AX and the
remainder in DX.
IDIV reg/mem32 F7 /7 Perform signed division of EDX:EAX by the contents of a
32-bit register or memory location and store the quotient in EAX and
the remainder in EDX.
IDIV reg/mem64 F7 /7 Perform signed division of RDX:RAX by the contents of a
64-bit register or memory location and store the quotient in RAX and
the remainder in RDX.
Gerd
>
>Cheers,
>Dieter
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