Author: Darrel Briley
Date: 07:50:22 05/26/05
Go up one level in this thread
On May 26, 2005 at 10:24:49, Günther Simon wrote: >On May 26, 2005 at 07:11:26, Steve Glanzfeld wrote: > >>On May 26, 2005 at 05:03:01, Robert Hollay wrote: >I don't remember though, why the PIII has a relative advantage... > >>Steve The P4 is capable of few IPC (instructions per cycle) than the PIII due to the P4's longer pipeline. It's been said this design decision was made largely due to the Intel marketing department.
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