Author: Amir
Date: 05:02:49 07/03/05
Go up one level in this thread
On July 03, 2005 at 07:21:55, Vincent Diepeveen wrote: >On July 03, 2005 at 06:57:42, Amir wrote: > >>On July 03, 2005 at 06:50:23, Vincent Diepeveen wrote: >> >>>On July 03, 2005 at 06:10:37, Amir wrote: >>> >>>>I have noticed that playchess.com software tells you the opponents KN/s after >>>>each game. Can anyone who has played Hydra (the new version -- Ares01) posts >>>>it's KN/s? >>> >>>It had about 220 million nps against us. >>> >>>Note that hardware nodes are not like software nodes. >> >>so 220 million nps is average for Hydra? > >it is hardware, so it gets in endgame not more nodes than it gets in opening. >arguably in endgame it gets less nps than opening because the treesize of 1 >search of 2 to 3 ply is smaller. > >so yes 220 mln is average for 32 processors. please note i calculated theoretic >peek of it at 320 mln nps for 32 fpga chessprocessors. the machine has room for >64 fpga processors in total. > >1 fpga chessprocessor can get clocked at like 60-66Mhz easily. > >So I calculated peek at theoretic 60Mhz, that's very pessimistic taken. >Important runs they will clock it a tad higher to 66Mhz or so. > >So on paper the real theoretic peek is even higher in reality. More like 400 mln >nps, but you never get your peek in hardware of course. > >There is latency of pci bus, there is time needed to put all cpu's to work and >so on. > >By the way, my own experiments at supercomputers indicated that 16 cpu's is most >easy to get a good speedup from, relative seen. 32 cpu's it is a lot hardware, >but putting 32 cpu's to work is real easy. Yet the extra speedup you get from >moving from 16 to 32 cpu's is not so big. Not only speedup gets bigger, also the >worst case speedup still is utmost tiny. > >But the nodes per second out of 32 fpga processors being 220 million is very >constant. It hardly fluctuates. It's not that 1 run it's 50 million and the next >one 500 million. It's simply always around that 220 million. Since the cluster is 64 CPUs, what would be the nps when they get 32 more FPGA cards?
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