Author: Ed Schröder
Date: 01:24:19 08/27/05
Go up one level in this thread
On August 27, 2005 at 03:41:36, Gerd Isenberg wrote: >On August 26, 2005 at 18:12:30, Ed Schröder wrote: > >>I am no longer up-to-date regarding the newest processors (such as the AMD-64) >>and the internal working concerning speed, hence my question: >> >>Which (similar) code is faster? >> >> test byte ptr xxx,1 | test byte ptr xxx,1 >> je label | mov AL,[ECX] >> mov AL,[ECX] | je label >> mov BL,[EDX] | mov BL,[EDX] >> ... ........ | ... ........ >> ... ........ | ... ........ >>label: | label: >> >>Thanks in advance, >> >>Ed > >Hi Ed, > >the conditional jump target is taken from the branch target buffer based on >recent targets anyway. I usually prefere your second one, to try to "hide" the >latency the zero flag becomes valid (you might also have cache misses of the >memory reads as well), but with todays super pipelined processors with huge >branch heuristics and out of order execution, i guess that doesn't matter much. Hi Gerd, I already feared your answer in the sense that it doesn't matter much, if it ever has been a topic at all. So thanks for saving me the trouble of a time consuming and risky rewrite of some of my critical code. Do you by accident have a link to offer about the AMD-64 cycle timing? My best, Ed
This page took 0.01 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.