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Subject: Re: x86-64 ASM output of a simple test program

Author: Gerd Isenberg

Date: 09:24:50 09/30/05

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>Yes, it looks fine. I prefer to use one more volatile register (r8/r9) to hold
>the manifest constant and save one load operation.
>

hmm... yes, probably due to the long opcode of loading a immediate 64-bit
constant into a register. Otoh even if r8/r9 are volatile registers, if not used
by a leaf-callee a caller using those registers may not save/resore it.
I also have the impression that msvc is a bit conserative using architectual
registers - may be for a good reason.

And in this special case, the second constant is changed to a pre mask value
(ffff7f7f7f7f7f7fH) by some nice optimization process, see the shift left 36.

As already mentioned, if more directions are processed in parallel with inlined
Kogge-Stone routines, instructions may hopefully scheduled more parallel with
let say 2*3 registers...

Gerd


typedef unsigned __int64 BitBoard;

BitBoard notA = 0xfefefefefefefefe;
BitBoard notH = 0x7f7f7f7f7f7f7f7f;

// deo - bishops/queens, pro - set of empty squares

__forceinline
BitBoard rightUpAttacks(BitBoard deo, BitBoard pro) {
 pro  = pro &  notA;
 deo |= pro & (deo <<  9);
 pro  = pro & (pro <<  9);
 deo |= pro & (deo << 18);
 pro  = pro & (pro << 18);
 deo |= pro & (deo << 36);
 return (deo << 9) & notA;
}

__forceinline
BitBoard leftDownAttacks(BitBoard deo, BitBoard pro) {
 pro  = pro &  notH;
 deo |= pro & (deo >>  9);
 pro  = pro & (pro >>  9);
 deo |= pro & (deo >> 18);
 pro  = pro & (pro >> 18);
 deo |= pro & (deo >> 36);
 return (deo >> 9) & notH;
}

BitBoard diagonal1Attacks(BitBoard deo, BitBoard pro) {
  return leftDownAttacks(deo, pro) | rightUpAttacks(deo, pro);
}



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