Author: Paul Richards
Date: 11:21:18 05/13/99
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On May 12, 1999 at 23:20:36, Robert Hyatt wrote: >No, but the next time I communicate with him I'll remember to ask. He didn't >give any time-frame in the IEEE article. But Hsu is not 'slow' so it is >possible that the hardware is already done for all I know... IE he redid >the DB chips between 1996 and 1997, completely. Tell him I've already got the cash burning a hole in my wallet. :) I would also strongly suggest that the interface have all standard analysis features, including EPD input/output support like Crafty, since the analysis power is what will justify the cost for a lot of us chess nuts.
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