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Subject: Re: DB Chip will kill all comercial programs or.....

Author: Tom Likens

Date: 17:29:46 05/20/99

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On May 20, 1999 at 00:16:15, Robert Hyatt wrote:


>>>>All of these start up costs require financing.  I think Hsu will find it
>>>>difficult to raise sufficient funds since the revenue potential for a custom
>>>>chip based chess program is in my opinion insufficient to make this an
>>>>attractive investment.
>>>>                                James B. Shearer
>>>
>>>It sounds to me like a 'done deal'.  IE he says "I have a start-up ..."
>>>not "I am testing the water to see if I can get a start-up funded and ..."
>>
>>        Actually he said "forming" which does not indicate a "done deal" to me.
>>Also a start-up can be "formed" without complete funding.
>>                              James B. Shearer
>
>
>Yes, but I know Hsu, and he wouldn't/couldn't announce such a 'deal' without
>it being 'in place'.  Because when you go to work for IBM the first thing you
>sign is an 'intellectual property rights' statement.  Same thing where I work.
>I wouldn't have publicized offering Crafty freely without making sure that it
>was "ok" first.  Doing such with a commercial entity like IBM would be suicide,
>because of the intellectual property rights, confidentiality, non-disclosure,
>non-competition, etc agreements you sign _before_ you start to work there...
>
>Which is why I said "I think that getting the rights to manufacture / redesign
>a new chip is a done deal."  As to whether he has funding to build it, this is
>not going to cost a fortune.  Custom ASICS are not horribly expensive at all...

Actually, depending on the deal Hsu has worked with the venture captialists and
the EDA tool companies an ASIC startup can be reasonably expensive or
outrageously expensive.  The NRE (Non-Recurring Engineering) cost for a 0.25
micron fab wafer run in most fabs will be in the $100-200k range/chip.
The real cost of an ASIC startup is the cost of the tools.  A full-blown
Avant! seat runs about one-million/seat.  Also they'll probably be
using Synopsys (which is definitely not free) for compiling their Verilog or
VHDL into gates, unless they are doing full-custom design, which is unlikely.
More likely the datapath elements will be custom layout but the control will
be synthesized logic gates.  The tools are wicked expensive not to mention the
lab they will need to establish to test the parts once they come back.

I've worked as an ASIC engineer at two different startups over the last three
years.  The first startup cost roughly 8 million (and unfortunately folded, most
do). The second startup (which I currently work at) has received over 50 million
in VC money (we still haven't IPOed, although I'm hoping it happens this fall).

The point is that getting an ASIC startup off the ground to develop is not a
trivial exercise(of course designing a computer to defeat Kasparov wasn't a
walk-in-the-park either).  Still I'm definitely rooting for Hsu to make a go
of it.  If he does I'll be one of the first to line up to purchase BabyBlue.
Still we shouldn't underestimate how difficult or expensive a task Hsu has set
for himself.

--Tom Likens



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