Author: Robert Hyatt
Date: 05:59:18 08/14/99
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On August 14, 1999 at 02:38:06, David Blackman wrote: >On August 13, 1999 at 21:20:03, Robert Hyatt wrote: > >>Takes a new way of thinking... and I am not sure PC platforms will provide >>Cray functionality, to support the above sort of things. They most likely >>will support raw vector computation, but leave out the cute selection/comparison >>stuff due to the number of transistors it takes... > >I'm not sure either if PCs will provide this functionallity. But it's not due to >lack of transistors. The main reasons would be lack of imagination, lack of >remaining bits in the opcodes (especially for X86) and limited bandwidth and >out-of-order capability on the memory access pipelines. Current micro chips have >huge numbers of transistors and a Cray style vector unit would easily fit on a >small corner of these chips. I think that the vector transistors would _outnumber_ the scalar transistors 2-to-1 if you implement the complete cray instruction set (vectors) in a micro. There are some really clever things going on in the Cray CPU's. And then there is the memory bandwidth issue, which is another killer, because a vector machine needs _bandwidth_ as that is the point of vector hardware. It wouldn't be any fun to have a vector instruction set that was no faster than the scalar instruction set. Yet on the Cray 100X faster for vector operations is quite the norm, perhaps as much as 256X faster now... The PC would just have a novel new set of instructions, which can shrink the executable size. But without much faster memory access times, or huge numbers of banks w/interleaving, it isn't going to be useful for chess...
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