Author: Frank E. Oldham
Date: 13:04:27 10/05/99
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The biggest advantage to AltiVec for programs using bitboards would i suspect be in the capability to have 64 bitboards in cpu registers at any one time! No main memory cycles, no L2 cache cycles, ... And bitboard operations are significantly sped up. But program code would indeed have to be changed. A good starting page for info is <http://gemma.apple.com/hardware/altivec/> http://www.motorola.com/SPS/PowerPC/teksupport/teklibrary/manuals/altivecpim.pdf is the Programmer's Interface Manual http://www.mot.com/SPS/PowerPC/teksupport/teklibrary/manuals/altivec_pem.pdf is the Programming Environment's Manual The G4 chip supports full-speed backside cache (like the G3) -- it also supports a 128-bit L2 cache bus, but Apple isn't using this feature in current models. Frank
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