Author: Tom Kerrigan
Date: 17:15:12 12/15/99
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On December 15, 1999 at 19:56:30, Greg Lindahl wrote: >Xilinx's current product line goes up to 1,000,000 gates. It's helpful to stay >well below that maximum for cost reasons, of course, but 150k is well within >reach. The FPGA clock rate today is above Deep Blue's ASIC clock rates then. An FPGA may have 1M gates, but it seems to me that a lot of those would be devoted to solving wiring problems... The fact remains that IBM spent a LOT of money to make those custom ASICs. If FPGAs could begin to approach the functionality they needed, they would have saved themselves hundreds of thousands, perhaps millions, of dollars. But they didn't. I doubt that FPGA technology has made the advances necessary to replace a state-of-the-art 1996 ASIC. >BTW, I wasn't intending to get into a discussion about the proposal here. I was >asking for volunteers. Too bad, I want to discuss it. -Tom
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