Author: David Blackman
Date: 23:37:24 12/16/99
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On December 16, 1999 at 12:30:55, Tom Kerrigan wrote: >A friend of mine works for HP, designing the PA microprocessors. I asked him if >it was possible to put the Deep Blue chip design (or something comparable) on an >FPGA. Here's his response: [ lots cut ] >Therefore, in my opinion as a professional microprocessor designer, >the thought of realizing a modern complex processor using an FPGA >device shows a good deal of naiveté. > >Steve Wells Get one of those chips that have CPU + ROM + RAM + FPGA all on the one chip. Stage 1: port a simple chess program to the CPU. Stage 2: Do a static eval in the FPGA. This boils down to a lot of and/or/not arrays to detect features and a lot of small ALUs in a tree to add up the bonuses for the features detected. If this is done right, it gives you an eval as good as the smart/slow programs, without costing you any significant slow down. Stage 3: Determine what parts of the program are taking all the time. Probably you do this by running it on a simulator on your PC. Rewrite as many of the critical bits as possible to run in parallel on lots of gates on the FPGA. Move generator and sorter is a likely one. If you do repetition detection (and the Deep Blue team thought this was important even near the leaves) that is another good candidate. Stage 4: Build interface hardware and a driver program on a PC that can handle heaps of these chips all running in parallel efficiently. This part is probably at least as hard as the others. Stage 5. Put heaps of PCs each outfitted as in stage 4 on a fast LAN and program them to work together on the tree search efficiently. I think all this can be done, although with the current FPGAs you probably won't do quite as good per chip as Deep Blue did. It will take a bit of persistence though. Until Stage 3 is done the results won't be very impressive, and you need a lot of work to get that far.
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