Author: Robert Hyatt
Date: 18:52:01 12/20/99
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On December 20, 1999 at 16:03:16, Greg Lindahl wrote: >On December 18, 1999 at 07:20:15, Albert Silver wrote: > >> [...] if you explained not only what a hardware-based engine would need, >>as you are clearly the most appropriate person to do so, but a quick run through >>on what a chess engine is constituted of: Move generator, alpha/beta, eval >>function. > >Vincent Diepeveen gave me some good references. > >There is no reason why you have to assume that you must have the move generator >or alpha/beta search on the FPGA. That assumption underlies Bob's claims about >feasability, and my complaint that there's more than one way to skin a cat. > >I would love to see a discussion about the minimum useful stuff on an FPGA, but >of course that depends on how your engine is written, and Bob's engine spends >relatively little time in eval. > >-- g Again, that statement is simply wrong. 50% of the time is spent in the eval. That is more than any other single component by a wide margin. Doing what 1978 Belle did (evaluate, make/unmake, and generate moves) was not a bad approach. But it left a huge bottleneck between the software running on the PDP-11 cpu and the hardware (PLAs back then). Ken realized that to dump the bottleneck, he had to dump the software and get the hardware to doing everything, which he did in the 1980 version of Belle. Deep Thought did this from day 1, following on his experiences...
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