Author: Andreas Stabel
Date: 09:11:09 02/16/00
Go up one level in this thread
On February 16, 2000 at 12:01:51, Eugene Nalimov wrote: >On February 16, 2000 at 03:16:04, Ricardo Gibert wrote: > >>On February 16, 2000 at 02:54:16, Christophe Theron wrote: >> >>>On February 16, 2000 at 02:47:16, Ricardo Gibert wrote: >>> >>>>On February 16, 2000 at 02:12:21, Eugene Nalimov wrote: >>>> >>>>>On February 16, 2000 at 00:26:19, Christophe Theron wrote: >>>>> >>>>>>On February 15, 2000 at 22:45:28, Tom Kerrigan wrote: >>>>>> >>>>>>>On February 15, 2000 at 20:42:43, Ricardo Gibert wrote: >>>>>>> >>>>>>>>MIPS VR4121 is a 64 bit CPU according to NEC. Look at >>>>>>>>http://www.nec.com/Semiconductors/categories/679/981008.html >>>>>>> >>>>>>>You're right... Hmmm... I wonder what the "64 bit" measures. Maybe memory >>>>>>>interface? Because it seems pretty silly to have a full-blown 64-bit embedded >>>>>>>processor, when your desktop machine is still 32-bit... >>>>>>> >>>>>>>-Tom >>>>>> >>>>>> >>>>>>Wait a minute. The VR4121 processor claims pin-to-pin compatibility with the >>>>>>VR4111. And the VR4111 is a "false 64 bits" processor. Operations can be done on >>>>>>64 bits internally, but the data bus size is 16 or 32 bits. That is, there is a >>>>>>serious bottleneck between the processor and the memory when it comes to 64 bits >>>>>>values. >>>>>> >>>>>>I'm not even sure that this processor really supports clean 64 bits operations. >>>>>>All the docs I have mention 16 and 32 bits long instructions. How do you perform >>>>>>a move immediate with a 64 bits value if your instruction length is limited to >>>>>>32 bits? >>>>> >>>>>IBM/360, as well as IBM/370, also have no instruction "move immediate 32-bit >>>>>value"; if you want to load literal that is longer than 12 bits, you have to >>>>>load it from memory. Nevertheless it is true 32-bit processor. >>>>> >>>>>At that MIPS processor, loading/storing 64-bit values can be slower than 32-bit >>>>>values - but total impact on performance would be small enough. Small size of >>>>>cache is much more important, but I believe Crafty would perform as it's running >>>>>on P90-120. >>>> >>>>Windows 95 Pentium P5-120 159.4 Drystone MIPS >>>> >>>>Win CE VR4121 131mhz 174 Drystone MIPS >>>> >>>>So your prediction is not bad. >>> >>> >>>Do you have the Drystone MIPS for the DragonBall EZ? Motorola claims 2.7 for his >>>16.58MHz processor, but I wonder if it has been checked by somebody else. >>> >>>Is there a web site with a compilation of Drystone MIPS for a bunch of popular >>>processors? >>> >>> >>> Christophe >>> >>> >>> >>> >>>> >>>>> >>>>>Eugene >>>>> >>>>>>And don't count on the 8Kb internal L1 data cache to store all the data needed >>>>>>by Crafty... >>>>>> >>>>>>A bitboard program looks like a poor choice for this architecture. >>>>>> >>>>>> >>>>>> >>>>>> Christophe >> >>I went to the following site for the Pentium statistic: >> >>http://performance.netlib.org/performance/html/dhrystone.data.col0.html >> >>This site does not seem to include statistics for HPC/PPC type CPUs. The VR141 >>statistic came from the NEC site. Given manufacturers penchant for exagerated >>claims, it must be taken with a grain of salt. Therefore, "rough" equivalence >>with the P5-120 seems reasonable. > >Dhrystone is executed entirely from the cache, plus it have very small data set >that fits into cache, too. So, for more typical programs performance will >degragate - so I am stuck with my 'p90-p120-level performance estimate'. > >Eugene It is pretty simple to completely optimize Dhrystone away, so the Dhrystone speed may be chosen to be whatever the compiler maker whishes. I've been working with compilers, so I know :) Regards Andreas stabel
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