Author: Robert Hyatt
Date: 10:39:13 02/16/00
Go up one level in this thread
On February 16, 2000 at 13:31:46, Eugene Nalimov wrote: >On February 16, 2000 at 12:37:00, Christophe Theron wrote: > >>On February 16, 2000 at 06:34:30, Tom Kerrigan wrote: >> >>>On February 16, 2000 at 00:26:19, Christophe Theron wrote: >>> >>>>I'm not even sure that this processor really supports clean 64 bits operations. >>>>All the docs I have mention 16 and 32 bits long instructions. How do you perform >>>>a move immediate with a 64 bits value if your instruction length is limited to >>>>32 bits? >>> >>>Move immediates are a little silly on RISC processors... >>> >>>You can't even fill a 32 bit register with a move immediate. >>> >>>-Tom >> >> >>So the compiler has to put the data into a static data area, then produce a >>'move from address' instruction? >> >>That must be a "pleasure" to program this chip in assembly... :( > >Usually there are special instructions "load to low N bits", "load to high 32-N >bits", so you can load large literal usingl something like > mov r1, lo(literal) > movhi r1, hi(literal) >which is way faster than going into memory. But on *some* processors (ARM, >IBM/360) yes, you have to go into memory. Usually assembler will do the dirty >job for you, and will translate > mov r1, =L'literal' >into e.g. > mov r1, [pc+label] > ... >label: dc =L'literal' There are usually other things to do too. On a sparc, loading from R0 always gets you '0' (of course you can xor a register with itself to do the same thing) if you only want a 0 value. Some machines have/had a cheap -1 "register access" as well to get a -1 which is pretty common. > >Fortunately, there are not many *really* 32-bit constants in the programs (were >it other way, processors would include instrcution 'load 32-bit value', of >course). > >Eugene >>Forgive my ignorance about RISC computers... >> >> >> Christophe
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