Author: Francesco Di Tolla
Date: 00:28:02 03/03/00
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On March 02, 2000 at 16:29:19, Tom Kerrigan wrote: >I was just looking at this document: > >http://www.mips.com/products/5Kc.pdf > >It says the die size of this 64-bit core is 3 mm^2 (0.18 um)!! > >I believe the Celeron die size is ~80 mm^2. > >So it seems like you should be able to put a dozen of these cores onto one chip >with room left over for a big wad of L2 cache. > >That would be pretty awesome for a chess program... > >-Tom This are low power chips that are used in embedded system and handheld devices, and the performances are somewhat reduced. But Pentiums already had several units on the same die, actually the Pentium was a sort of two 486 integer units on the same die. Pentium II/III have even multiple FPU units as far as I know. regards Franz
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