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Subject: Re: Hyper Threading and Chess

Author: Matt Taylor

Date: 19:41:49 12/31/02

Go up one level in this thread


On December 31, 2002 at 20:17:26, Robert Hyatt wrote:

>On December 31, 2002 at 11:49:31, Vincent Diepeveen wrote:
>
>>On December 30, 2002 at 22:32:52, Robert Hyatt wrote:
>>
>>>On December 30, 2002 at 20:29:11, Vincent Diepeveen wrote:
>>>
>>>>compare with the 64KB L1 data cache of a K7 which is i guess 16384
>>>>doublewords.
>>>
>>>
>>>what is with all the quadword/doubleword nonsense?
>>
>>>I think _most_ here can figure out what 64 KB turns into in your favorite
>>>data size...
>>
>>64KB of K7 and just 1024 words of P4.
>
>Again, what is with mixing terms?  64KB on K7, 8KB on P4.  Although that is
>not a correct comparison since the P4 has more than 8KB of L1 cache...  when
>you count the trace cache as well.

I think he meant data cache only. The Athlon has a total of 128 KB of L1 cache
(64K data/64K code). The part about "words" and "quadwords" and "doublewords" is
indeed nonsensical.

-Matt



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