Author: Tom Kerrigan
Date: 13:35:04 04/14/03
Go up one level in this thread
On April 14, 2003 at 16:06:57, Vincent Diepeveen wrote: >On April 14, 2003 at 15:25:15, Tom Kerrigan wrote: > >>On April 13, 2003 at 22:58:48, Jeremiah Penery wrote: >> >>>>I bet intel will call P4-Prescott to be SMT too instead of CMP. But do you >>>>really believe it's SMT? >>> >>>Um, yes. >> >>Heh. Absolutely. >> >>Look at the pictures of the die. >> >>Do you see 2 CPUs? > >>I don't. > >Look again. 2 rapid execution engines (cpu's) with each their own 16KB L1 cache: > >http://www.chip-architect.com/news/2003_03_06_Looking_at_Intels_Prescott.html Ha, you think rapid execution engines are CPUs? Then what is all that other stuff on the chip, besides the rapid execution units and the L2 cache? Filler? -Tom
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