Author: Robert Hyatt
Date: 15:24:44 08/22/04
Go up one level in this thread
On August 22, 2004 at 17:20:08, Tom Kerrigan wrote: >On August 22, 2004 at 11:18:43, Robert Hyatt wrote: > >>On August 22, 2004 at 03:11:59, Tom Kerrigan wrote: >> >>>On August 21, 2004 at 17:48:08, Robert Hyatt wrote: >>> >>>>That is _all_ I have said. I don't know what my working set is. I don't care >>>>what it is. I do know that for two different testers, bigger cache was faster, >>>>for Tom it wasn't. Why that is I have no idea, I really don't care, and I don't >>>>see any point in investigating further. >>> >>>I didn't test 256k to 512k at all, remember? That was from a hardware review >>>site that I have nothing to do with. >>> >>>I did run the 512k to 1024k experiment and my dual proc experiment, both of >>>which confirm the conclusion that I drew from Anandtech's data. >>> >>>-Tom >> >> >>OK. My error. However, Anandtech doesn't have a stellar reputation of late >>with regards to such tests. See their gaffe with TSCP. > >In the TSCP case, they were compiling TSCP themselves and not running the same >binary on both systems. Since the Sempron is all but identical to the Athlon 64, >I have no reason to believe that they mis-built Crafty for each system in such a >way that the speed was identical. > >>I have personally run 512K 1024K and 2048K. And I saw results from 1.5MB and >>3.0MB when Eugene ran his tests. All the AMDs I have access to are opterons >>with 1024K of L2: > >Your data is crap. It's old and it's not reproducable. Even if I cared about old >versions of Crafty and had a bunch of Xeons, you won't tell us what version you >were using. (Or even give us a range of versions you might have been using.) Exactly how would I know? But "my data is crap"? From someone that says the executable needs 5mb of ram when default has 4mb for hash before you even get started with other stuff? > I'm >inclined to give you the benefit of the doubt because Eugene also saw an >increase, but I don't see how it matters anyway because now we have recent data >from two new independent sources (namely Anandtech and myself). > >-Tom Exactly what did anandtech use? Note that Eugene's data wasn't 4 years old. Mine did date back to when the quad xeon boxes first hit the market. I doubt that my cache footprint has changed much other than that it has gotten larger as I have added more and more large bitmap tables. The reference patterns are a bit better, but the main changes had to do with global data that was shared and modified, which killed the MOESI AMD cache coherency stuff. I'll find the actual working set at some point in time... I just need to figure out how to completely disable hashing so that doesn't factor in. More on that later and then we will _know_ what the WSSize really is...
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