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Subject: Re: Hardware chess evaluation for everyone

Author: Robert Hyatt

Date: 10:24:45 06/30/98

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On June 30, 1998 at 10:47:26, Dezhi Zhao wrote:

>
>On June 29, 1998 at 18:57:34, David Fotland wrote:
>
>>
>>Field programmable gate arrays range from 40,000 gates at $3 to over 500K
>>gates with 270K bits of RAM, and can clock up to 80 Mhz.  This is at least
>>as dense and fast as the Deep Blue chips.  See www.xilinx.com for example.
>>
>>It would be easy to put together a PCI card with one of these chips on it.
>>Chess developers would then all have access to similar hardare
>>technology as Deep Blue.  If someone designed the basic hardware eval
>>and search blocks, it would be easy for someone with a software background
>>to modify the evaluation function and reprogram the FPGA.
>>
>>I did a short search and didn't find anyone already selling an FPGA PCI
>>evaluation card, but there may be one.  We may even be able to convince
>>an FPGA vendor to design the PCI card for the publicity.  If not I could
>>do it, or anyone with a little bit of hardware background.
>>
>>Anyone interested in using or buying such a card?  With a little volume
>>the card would be inexpensive.  Perhaps $25 since it just a small PC board,
>>a cheap connector, and the FPGA chip (which would also be the PCI interface).
>>
>>David Fotland
>
>It seems to me a great idea. I just visited www.xilinx.com. Could you
>specify a particular page in it for me to start with?  If it could be around
>$25,
>your idea would certainly feasible. With the PCI card, commercial programmers
>can get rid of dangles.
>I had no FPGA experience. I got a question to hardware experts here:
>How difficult to implement it?
>
>Best Regards
>
>Dezhi Zhao


not hard.  this is *exactly* how the original 160K nodes per second Belle
was built...  Note that it makes modification a process of throwing out the
old and burning the new...



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