Author: fca
Date: 15:35:16 08/12/98
Go up one level in this thread
On August 12, 1998 at 14:08:15, Tom Kerrigan wrote: >On August 12, 1998 at 10:58:17, fca wrote: > >>SUMMARISED VIEW OF FCA: As long as L2 size/speed keep up with "core MHz ratios >>times allowance for P-->P2 ", it is not relevant when trying to explain >>differences in performance of (say) Junior on a P200MMX and a P2/300. > >Yes, I disagree. I read that as "I disagree." <stated to avoid misunderstandings>, which was also your initial position as I understood it. (1) So, you believe a program that hit L2 hard would do better on a P2/300 than on a P200MMX by an amount (ratio terms everywhere, of course) greater than you would expect from just a core comparison (i.e. L2 matters) >"Core improvements" doesn't simply mean that instructions are executed faster. For sure. >The P6 core is designed to be less dependent on the L2 cache, too. For sure. The P6 core, as used in say the P2/300. Please label the last quote (2). To me it looks as if (1) and (2) cannot co-exist. What am I missing? Kind regards fca PS: > The obvious example here is the Celeron albeit at 266MHz, but I agree with this point anyway. >, which doesn't have ANY L2 cache, and it still >manages to keep pace with a Pentium MMX/233 with 512k L2 cache.
This page took 0 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.