Author: Jeremiah Penery
Date: 15:00:06 02/28/03
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http://ccc.it.ro/search/ccc.php?art_id=189071 In case the link doesn't work, here's what it says: ---- Posted by : Eugene Nalimov on September 16, 2001 at 18:07:01 Bob, Here Vincent is right. GCC core was written in 80's with VAX and 68k as its primary targets, and it dis not contain optimizations that were unnecessary than. Developers were able to add some optimizations later, but unfortunately, to implement some optimizations correctly, total redesign is necessary, and it was not done (yet?). Look, for example, at the minutes of the IA-64 GCC IA-64 Summit (http://gcc.gnu.org/ml/gcc/2001-06/msg01634.html) for the current state of the IA-64 gcc port. Compiler is functional, but it produces *very* inefficient code. Main problem is memory disambiguation (interference information, aliases analysis). It is very hard to do it properly on GCC's program internal representation (RTL), as too much information is lost during early compilation phases. Problem affects GCC code quality on all modern CPUs, but it's *vital* for the IA-64. Vincent is right, the more registers the CPU has, the more severe is the problem -- to efficiently use large number of registers compiler must have good interference information. Small numbers of registers on x86 helps GCC there, genereated code is suboptimal due to other reasons. Eugene
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