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Subject: Re: about a wrong conception that I had.

Author: Jeremiah Penery

Date: 22:50:43 09/26/03

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On September 27, 2003 at 01:29:31, Uri Blass wrote:

>On September 26, 2003 at 19:01:05, Jeremiah Penery wrote:
>
>>On September 26, 2003 at 18:04:04, Uri Blass wrote:
>>
>>>I do not know the future and I admit that I understand nothing about future
>>>computers so I see no reason not to assume that there will not be another
>>>improvement in hardware of having even faster memory(let call it L0 cache) when
>>
>>Your 'L0' cache would be the registers.  Opteron, for example, has just over
>>21Kb of total register space (most is not visible to programmers).
>>
>>>next year computers may have only 128 kbytes L0 cache and 1Mb L1 cache and we
>>>are again in similiar case because now the L1 cache becomes the slow memory.
>>
>>On the P4 and Itanium, L1 access takes only 2 clock cycles.  It's practically
>>impossible to get faster than that.
>
>Why?

It could conceivably be one clock cycle to access, but it would have to be
smaller then also.  The more memory you have the slower it must be accessed,
mostly because of greater wire delays and such that are associated with the
increase in transistor count that comes with bigger memory.

>What about memory that you get in time of 0.1 clock cycles?

That would be pointless, even if it could be done, for the very reason you give
below - it would have to wait until the next clock cycle to be useful.

>It is 20 times faster.
>
>If less than 1 clock cycle is impossible or meaningless because you need to wait
>to clock cycle then what about doing the clock cycles faster so L1 access takes
>20 clock cycles instead of 2 clock cycles and now you suddenly need faster
>memory.

Then you just have a faster processor, and the new faster memory is just the old
L1 cache scaled to the same clockspeed.  When you go from the original Pentium
to a Pentium4, the clockspeed may be 300x faster, but you still have the same
L1, L2 caches.  The L1 from the Pentium didn't just stay the same and become the
L2 in the Pentium4 (or P2, P3).  It was scaled to fit the processor, just like
every other part.



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